The present invention relates in general to semiconductor technology and more particularly to semiconductor power devices with high aspect ratio contact openings and methods for forming the same.
Generally, an n-channel trench-gate power MOSFET includes an n-type substrate on which an n-type epitaxial layer is formed. The substrate embodies the drain of the MOSFET. A p-type body region extends into the epitaxial layer. Trenches extend through the body region and into the portion of the epitaxial layer bounded by the body region and the substrate (commonly referred to as the drift region). A gate dielectric layer is formed on the sidewalls and bottom of each trench. Source regions flank the trenches. Heavy body regions are formed within the body region between adjacent source regions. Gate electrodes (e.g., from polysilicon) fill the trenches and embody the gate of the MOSFET. A dielectric cap covers the trenches and also partially extends over the source regions. A top-side metal layer electrically contacts the source regions and the heavy body regions. A bottom-side metal layer contacts the substrate.
In some MOSFETs, the metal contact to the source and heavy body regions is made through contact openings. As the process technology migrates to smaller geometries, forming and properly filling such contact openings becomes more difficult. Thus, there is a need for techniques that enable forming and properly filling such contact openings in power devices.